Equivalent 1.4nm Without Shrinking Transistors? How Huawei Tau Law Bypasses the EUV Blockade

Published on: 2026-05-27

Equivalent 1.4nm Without Shrinking Transistors? How Huawei's "Tau Law" Bypasses the EUV Blockade

Abstract: Huawei has proposed the "Tau (τ) Law," substituting temporal scaling for geometric scaling. Through logic folding technology, it achieves equivalent 1.4nm process node performance without relying on EUV lithography machines—a breakthrough that Bernstein has called China's "another DeepSeek moment" in semiconductors. How will this entirely new path of chip breakthrough reshape the global semiconductor landscape?


381 chips, mass-produced over 6 years. While the entire world was fixated on EUV lithography machine shipments, Huawei quietly blazed an entirely different trail.

In 2025, Huawei officially disclosed the foundational methodology behind its chip R&D—the "Tau (τ) Law." The core thesis of this law is nothing short of disruptive: the leap in chip performance does not necessarily require shrinking transistors. Rather than grinding against physical limits in geometric dimensions, it proposes a different dimension altogether—replacing geometric scaling with temporal scaling. According to Huawei's roadmap, this technical route is projected to deliver equivalent 1.4nm process performance by 2031, and the entire process requires not a single EUV lithography machine.

International investment bank Bernstein stated plainly in a research report that this is "another DeepSeek moment" for China's semiconductor industry—the last time the world was forced to reassess China's technological prowess was when DeepSeek burst onto the scene in the large language model arena.

I. After Moore's Law Hit the Wall: The Semiconductor Industry's Ultimate Dilemma

To grasp the breakthrough nature of the Tau Law, one must first return to the fundamental predicament facing the chip industry.

Since Moore's Law was proposed in 1965, the semiconductor industry has been sprinting along the path of "shrink transistors → increase density → enhance performance" for nearly 60 years. From micrometers to nanometers, from 28nm to 3nm, each advance in process node has meant packing more transistors onto the same silicon area, making chips faster, more power-efficient, and cheaper.

But physical laws do not yield indefinitely. As process technology pushed below 5nm, quantum tunneling effects began causing transistors to "leak," short-channel effects degraded switching characteristics, and the complexity and cost of EUV lithography skyrocketed exponentially—a single ASML High-NA EUV lithography machine costs over $350 million, and globally, the number of companies that can afford and operate one can be counted on one hand.

For China's semiconductor industry, the predicament was even more severe: EUV lithography machines were under comprehensive embargo, and the physical pathway to sub-7nm advanced processes was nearly sealed off. If the industry continued along the "geometric scaling" route, Chinese chips might be trapped at the 7nm node—or even coarser—for the long haul.

Huawei's Tau Law is a direct answer to this predicament: if the front door is blocked, then open a window.

II. The Core of the Tau Law: Temporal Scaling, Not Geometric Scaling

The "Tau Law" takes its name from the Greek letter τ (tau), which in physics typically represents a time constant. The name itself hints at its core philosophy: using "time" rather than "space" as the lever for performance improvement.

The logic of the traditional path (geometric scaling) goes: smaller transistors → shorter signal transmission distances → faster switching speeds → stronger performance. The Tau Law skips the "shrink transistors" step entirely and instead addresses the core question directly: how to make signals travel shorter paths and take less time within the same physical space.

Huawei's answer is "logic folding" technology. Simply put, in traditional chip design, logic gates are laid out in a planar fashion, and signals must traverse large areas to cross regions. Logic folding restructures portions of the logic in three dimensions, dramatically shortening signal paths—thereby achieving performance equivalent to a smaller process node without changing the physical dimensions of the transistors.

To use an analogy: if a traditional chip is like a flat-spread city where a signal must travel from the east side to the west, then logic folding is like rebuilding that city into high-rises—the same functions are there, but the signal only needs to travel up and down a few floors rather than across the entire urban area.

The elegance of this approach lies in the fact that it circumvents EUV lithography machines as the core bottleneck. Geometric scaling requires EUV to pattern increasingly fine circuit designs, while temporal scaling relies more on architectural design and three-dimensional integration—domains where the technical barriers lie more in engineering innovation than in equipment monopolies.

III. 381 Chips in 6 Years: The Tau Law Is Not Just Theory

The most surprising thing about the Tau Law is not the theory itself, but the fact that it has already been validated in real-world practice.

Data shows that over the past six years, Huawei has successfully mass-produced 381 chips based on the Tau Law methodology. From smartphone SoCs to server processors, from 5G base station chips to AI accelerators, the coverage of this technical route is far broader than the outside world imagined.

The Kirin 9000S chip equipped in the 2023 Mate 60 Pro once baffled global analyst firms: how did Huawei achieve near-7nm performance under EUV embargo conditions? The disclosure of the Tau Law, in a sense, provided the answer—Huawei wasn't forcing a breakthrough on traditional process technology; it had switched to an entirely different track.

The mass production record of 381 chips demonstrates that the Tau Law is not a theoretical exercise in a laboratory, but a methodological system that has undergone large-scale engineering validation. From design tools to manufacturing processes, from yield control to performance tuning, Huawei has built a complete technology stack under the Tau Law framework.

According to Huawei's roadmap, the next milestone for the Tau Law is achieving equivalent 1.4nm process by 2031. With EUV lithography machines still under embargo, if this target is realized, it would mean that China's semiconductor industry will have forged an advanced process pathway entirely independent of EUV—a strategic significance comparable to China's autonomous nuclear and satellite breakthroughs of the past century.

IV. Shockwaves Through the Global Semiconductor Landscape

The emergence of the Tau Law has deep, structural implications for the global semiconductor landscape.

First, it undermines the industry consensus that "EUV equals advanced process." Over the past decade, the global semiconductor industry has formed a kind of implicit monopoly: whoever controls EUV lithography machines controls the entry ticket to advanced processes. ASML has consequently become the most powerful equipment company in the world, and the United States has maintained its technological moat in chips by controlling EUV exports.

The Tau Law proves that an alternative path bypassing EUV is viable. If equivalent 1.4nm is realized by 2031, the strategic value of EUV lithography machines will be significantly diluted—not that EUV becomes unnecessary, but that it is no longer the only path forward.

Second, the Tau Law could catalyze a paradigm shift in global chip design. When "temporal scaling" is proven capable of substituting for "geometric scaling," the optimization target of chip design will shift from pure area minimization toward more comprehensive metrics such as latency minimization and energy efficiency maximization. This paradigm shift favors companies with deep accumulation in architectural innovation, and disadvantages those that rely purely on process node dividends.

For China's semiconductor supply chain, the significance of the Tau Law is even more direct: it provides a realistic path to continue advancing process technology under sanctions. From EDA tools to packaging processes, from design methodologies to test verification, an industrial ecosystem coalescing around the Tau Law is taking shape, which will build new autonomous and controllable capabilities for China's semiconductor industry.

V. From Chip Breakthrough to Agent Computer: The Chain Reaction of Computing Autonomy

The impact of the Tau Law will not stop at chip manufacturing itself. When advanced process autonomy becomes reality, its effects will propagate upstream along the industry chain, ultimately altering the cost structure and competitive landscape of end products.

Take the Agent Computer as an example. Currently, the core competitiveness of an Agent Computer lies in the computing power for local deployment of AI agents—it determines how many agents the device can run simultaneously, how fast the response speed is, and how complex the tasks it can handle. All of these depend on the supply and cost of high-performance chips.

If the Tau Law route successfully lands, it means that China domestically can provide advanced-process AI chips, and the core computing components of the Agent Computer will no longer need to rely on imported advanced-process chips. This will directly bring about two changes: first, a dramatic improvement in supply chain security, eliminating the risk of being "choked" at critical junctures; second, as domestic advanced-process chip production scales up, the unit cost of computing power will continue to decline.

The KaiheAiBox Agent Computer is precisely pursuing the goal of making 7×24 continuously operating local AI agents affordable for every individual and every enterprise. Chip cost is the foundation of all this—when computing power becomes cheap enough, the Agent Computer can transition from a "niche premium" product to a "mass-market standard."

Viewed from this angle, Huawei's Tau Law breakthrough is not merely a technical innovation in the chip domain, but a pivotal step toward an autonomous and controllable AI hardware ecosystem. When chips are no longer the bottleneck, the popularization of the Agent Computer becomes merely a matter of time.


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